Special Control Register that controls the ARM Cortex M3 Operation Mode

ARM Cortex M3, when running in thread mode, has two privilege modes: "privileged" and "user". When thread mode is in "user" mode, it can not access to system control space and some instructions that access to special registers such as MSR are restricted.

Special control register is used to define the privilege level and the stack pointer selection. This register has 2 bits, bit zero and bit one.

CONTROL[0] : Stack status
1 = Alternate stack is used
0 = Default stack (Main stack pointer) is used

CONTROL[1] : Privilege status
1 = User state in thread mode
0 = Privileged in thread mode

Control bit 1 is writable only when the core is in thread mode and privileged.
Control bit 0 is writable only in a privileged state. Once it enters the user state, the only way to switch back to privileged is to trigger an interrupt and change this bit in priveleged hander mode.

	Privileged	User
When running an exception	Handler Mode
When running main program	Thread Mode	Thread Mode

Reference: The Definitive Guide to the ARM Cortex-M3 by Joseph Yiu pg 36